The present invention described herein relates to semiconductor device and method of forming the same, and more particularly, to a nonvolatile memory device and a method of forming the same.
Non-volatile memory devices are semiconductor devices which retain their stored data even when their power supplies are interrupted. Non-volatile memory devices are widely used in, for example, memory cards of computers. With the advance in communication technology, a requirement for a mass storage device increases and various studies of non-volatile memory devices are being performed.
A unit cell of a non-volatile memory device has a structure in which a floating gate, a gate interlayer dielectric layer and a control gate are sequentially stacked. A tunnel insulating layer through which charges pass to write data into the unit cell and erase data from the unit cell is disposed between the floating gate and the device substrate. A write operation and an erase operation of a non-volatile memory device are performed by the Fouler-Nodheim (FN) tunneling method. If lattice damage is present on a surface of the substrate, charges may be trapped in interfaces of the substrate and the tunnel insulating layer during a write operation and an erase operation of the non-volatile memory device, and a difference between a write threshold voltage and an erase threshold voltage may decrease as the write operation and the erase operation are repeated. Thus, a margin that can determine whether a unit cell is in a write operation or in an erase operation may decrease.
In a non-volatile memory device, a device isolation region is formed using a shallow trench isolation (STI) process to define an active region. In the STI process, a plasma etching process may be performed on a substrate so as to form a trench. When a plasma etching process is performed, lattice damage due to physical stress may occur on an inner wall of the trench. That is, the lattice damage occurs on an edge of an active region adjacent to a trench. If a tunnel insulating layer is formed on an active region, a tunnel insulating layer formed on a lattice damaged edge of the active region may be shallower than a tunnel insulating layer formed on a center of the active region. An electric field is concentrated on an edge of an active region which has a relatively shallow tunnel insulating layer during a write operation and an erase operation, resulting in degradation of the reliability of the device. As a design rule of a semiconductor device decreases, a width of an active region reduces and a ratio of an edge of the active region increases. Thus, reliability of the device is further degraded.
As a design rule of a semiconductor device decreases, a space between adjacent floating gates may be filled with a control gate so as to prevent interferences between adjacent floating gates. If a space between a control gate and a substrate decreases, a space between the control gate and an active region decreases, resulting in generation of a leakage current. As a cycle of a write operation and an erase operation is repeated, data retention capability may be further degraded.